Low Power Digital Circuits Session
Session Type: Lecture
Session Code: B3L-E
Location: Room 5
Date & Time: Tuesday December 13, 2016 (15:30 - 17:10)
Chair: Mathieu Thevenin

 

    Papers are listed in the order they will be presented.

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Paper
Id
TopicTitle/Author
3312 7 Energy Efficient Bootstrapped CMOS Inverter for Ultra-Low Power Applications
Mohammed Al-Daloo, Alex Yakovlev, Basel Halak
3281 7 Ultra-Low Voltage Standard Cell Libraries: Design Strategies and a Case Study
Somayeh Timarchi, Massimo Alioto
3017 15 Test of Low Power Circuits: Issues and Industrial Practices
Alberto Bosio, Patrick Girard, Arnaud Virazel
3048 1 PVT Variability Analysis of FinFET and CMOS XOR Circuits at 16nm
Fabio G. R. G. da Silva, Paulo Francisco Butzen, Cristina Meinhardt
3311 1 An Low-Energy 8T Dual-Port SRAM for Image Processor with Selective Sourceline Drive Scheme in 28-nm FD-SOI Process Technology
Haruki Mori, Tomoki Nakagawa, Yuki Kitahara, Yuta Kawamoto, Kenta T...