Sigma-Delta Modulators I Session
Session Type: Lecture
Session Code: A1L-D
Location: Salon A
Date & Time: Monday May 23, 2016 (10:30 - 12:00)
Chair: José M. de la Rosa

 

    Papers are listed in the order they will be presented.

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Paper
Id
TopicTitle/Author
1153 1.5 Design of a Power-Efficient Widely-Programmable Gm-LC Band-Pass Sigma-Delta Modulator for SDR
Alonso Morgado, Rocio Del Río, Jose M de la Rosa
1249 1.5 A 74.9 dB SNDR 1 MHz Bandwidth 0.9 mW Delta-Sigma Time-to-Digital Converter Using Charge Pump and SAR ADC
Anugerah Firdauzi, Zule Xu, Masaya Miyahara, Akira Matsuzawa
1272 1.5 A Calibration-Free 96.6-dB-SNDR Non-Bootstrapped 1.8-V 7.9-mW Delta-Sigma Modulator with Class-AB Single-Stage Switched VMAs
Stepan Sutula, Michele Dei, Lluís Terés, Francisco Serra-Graells
1525 1.5 A 24 mW, 80 dB SNR, 50 MHz Multi-Bit Continuous Time Sigma-Delta ADC in 28 nm FD-SOI
Anubhuti Chopra, Shouri Chatterjee
1857 1.5 Continuous-Time Delta Sigma Modulators with Dual Switched Capacitor Resistor DACs
Shanthi Pavan