Information for Paper ID 4077
Paper Information:
Paper Title: Time-Domain Neural Network: a 48.5 TSOp/s/W Neuromorphic Chip Optimized for Deep Learning and CMOS Technology 
Student Contest: No 
Affiliation Type: Industry 
Keywords: Deep Learning, Convolutional Neural Network, Neuromorphic Computing, ReRAM 
Abstract: Demand for energy-efficient hardware for deep neural network is increasing. Fully spatially unrolled architecture where each distributed weight memory has a dedicated processing element (PE) is the most energy-efficient solution because it completely eliminate the data moving for weight fetching. However, this requires a huge amount of hardware resources. We propose TDNN, which enables this by using ReRAM and the time-domain analog-digital mixed-signal processing that uses delay time as signal. In TDNN, a PE that performs synaptic operation is composed of only 12 logic transistors. The proof-of-concept chip with SRAM instead of ReRAM shows the energy efficiency of 48.5 TSop/s/W. 
Track ID:
Track Name: Emerging Technologies and Applications 
Final Decision: Accept as Lecture 
Session Name: Intelligent Circuits and Systems (Lecture)