VLSI V Session
Session Type: Poster
Session Code: B3P-W
Location: Salle de bal est
Date & Time: Tuesday May 24, 2016 (14:30 - 16:00)
Chair: Chuan Zhang,
Meng-Fan Chang



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1486 12.21 Ternary Max-Min Algebra for Representation of Reversible Logic Functions
Musharrat Khan, Jacqueline Rice
1488 12.21 Synthesis of Reversible Logic Functions Using Ternary Max-Min Algebra
Musharrat Khan, Jacqueline Rice
2301 12.21 Automated Synthesis of Stochastic Computational Elements Using Decision Procedures
Amad Ul Hassen, Brigadesh Chandrasekar, Sumit Kumar Jha
1410 12.3 Energy-Efficient Power Trimming for Reliable Nanophotonic NoC Microring Resonators
Mo Yang, Paul Ampadu
1222 12.0 Fault Tolerant Majority Voter Design Using Triple Transistor Redundancy
Atin Mukherjee, Anindya Dhar
1494 12.11 An All-Digital Fast Tracking Switching Converter with a Programmable Order Loop Controller for Envelope Tracking RF Power Amplifiers
Nijad Anabtawi, Rony Ferzli, Haidar Harmanani
1527 12.10 Real Time Low Complexity VLSI Decoder for Prefix Coded Images
Atif Ahangar, Rajat Agarwal, Kartik Lakhotia
2018 12.20 A Hardware Security Solution Against Scan-Based Attacks
Ankit Mehta, Darius Saif, Rashid Rashidzadeh
2174 12.20 A Self-Learning Framework to Detect the Intruded Integrated Circuits
Faiq Khalid Lodhi, Imran Abbasi, Faiz Lodhi Khalid, Osman Hasan, Fa...