3D SoC Session
Session Type: Lecture
Session Code: C1L-A
Location: Salon Drummond est
Date & Time: Wednesday May 25, 2016 (10:30 - 12:00)
Chair: Tian-Sheuan Chang,
Yeong-Kang Lai


    Papers are listed in the order they will be presented.

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1752 12.19 Layer Ordering to Minimize TSVs in Heterogeneous 3-D ICs
Boris Vaisband, Eby Friedman
1537 12.19 Accuracy-Improved Coupling Capacitance Model for Through-Silicon via (TSV) Arrays Using Dimensional Analysis
Tarek Ramadan, Eslam Yahya, Mohamed Dessouky, Yehea Ismail
1108 12.0 TCG-SP: an Improved Floorplan Representation Based on an Efficient Hybrid of Transitive Closure Graph and Sequence Pair
Taher Kourany, Emad Hegazi, Yehea Ismail
1766 12.19 Crosstalk Noise Effects of on-Chip Inductive Links on Power Delivery Networks
Ioannis Papistas, Vasilis Pavlidis
2156 12.19 Power-Aware Through-Silicon-Via Minimization by Partitioning Finite State Machine with Datapath
Ayub Chin Abdullah, Chia Yee Ooi, Nordinah Ismail, Nurita Binti Moh...