DSP Circuit Design Session
Session Type: Lecture
Session Code: C1L-B
Location: Salon Drummond centre
Date & Time: Wednesday May 25, 2016 (10:30 - 12:00)
Chair: Chuan Zhang,
Bah Hwee Gwee


    Papers are listed in the order they will be presented.

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1528 4.11 A Computationally-E Cient PWM Technique for Digital Class-D Amplifiers
Chih-Min Chang, Jieh-Tsorng Wu
1830 4.11 A Novel Computationally-Efficient Digital Frequency Locking Scheme for Software Defined Radio MODEM
Andrew Slaney, Yichuang Sun, Oluyomi Simpson
1974 4.11 Deep Learning Neural Networks Optimization Using Hardware Cost Penalty
Rohan Doshi, Kwok-Wai Hung, Luhong Liang, King-Hung Chiu
2314 4.11 PVT-Aware Digital Techniques for a Power Line Energy-Harvesting Sensor Node
Sherry Joy Alvionne Sebastian, John Richard Hizon, Louis Alarcon
1684 4.5 Using Template Matching and Compressed Sensing Techniques to Enhance Performance of Neural Spike Detection and Data Compression Systems
Nan Li, Morgan Osborn, Mohamad Sawan, Liang Fang